/* SIMON (98628) fast HP-IB card */
/* PHI chip registers are 'P_', Simon only are 'S_' */

/* The card */
#define UNIX_SIMON	0x680000

/* high order access bits */
#define P_HIGH_0        0x80
#define P_HIGH_1        0x40

/* interrupt register and mask */
#define P_PENDING       P_HIGH_0
#define P_PARITY        P_HIGH_1
#define P_STAT          0x80
#define P_ABORT         0x40
#define P_PPR_I         0x20
#define P_SRQ_I         0x10
#define P_FF_ROOM       0x08
#define P_FF_BYTE       0x04
#define P_FF_IDLE       0x02
#define P_FF_PCLR       0x01

#define P_ENAB          P_HIGH_0

/* outbound fifo */
#define P_FF_EOI        P_HIGH_0
#define P_FF_ATN        P_HIGH_1
#define P_FF_LF_INH     P_HIGH_0
#define P_FF_UCT_XFR    (P_HIGH_0+P_HIGH_1)

/* status */
#define P_REND          0x20
#define P_CTRL          0x10
#define P_SYC           0x08
#define P_TLK           0x04
#define P_LSN           0x02
#define P_FROZE         0x01

/* control */
#define P_8BIT          0x80
#define P_FREEZE        0x40
#define P_REN           0x20
#define P_IFC           0x10
#define P_RES_PP        0x08
#define P_SRQ           0x04
#define P_FF_SEL        0x02
#define P_INIT_FF       0x01

/* HP-IB control */
#define P_ONL           0x80
#define P_TA            0x40
#define P_LA            0x20
#define P_HPIB_M        0x1f

/* simon control bits */
#define S_ENAB		0x80
#define s_PEND		0x40
#define S_LEVMSK	0x30
#define S_LEVSHF	4
#define S_WRIT		0x08
#define S_BYTE		0x04
#define S_DMA_1		0x02
#define S_DMA_0		0x01

/* simon card structure */

struct simon {
    unsigned char sf1,
    sim_reset,
	sf2,
    sim_stat,
	sf3,
    sim_latch;
    long sf4,
	sf5;
    short sf6;
    unsigned char sf7,
    phi_intr,
	sf8,
    phi_imsk,
	sf9,
    phi_fifo,
	sf10,
    phi_stat,
	sf11,
    phi_ctrl,
	sf12,
    phi_hpib,
	sf13,
    phi_ppmsk,
	sf14,
    phi_ppsns;
    };

#define sim_id sim_reset
#define sim_ctrl sim_stat
#define phi_fstid phi_ppmsk
#define phi_secid phi_ppsns

/*  a disk/tape descriptor is:
    major :8
    type  :3     the model -- mode of action for tape
    h_addr:3     hpib address of the controller
    d_addr:2     the unit number on the controller

   for tape, the type field is:
	x - undefined
	x - undefined
	1 - rewind on close
   for disk, the type field is an index into a table of descriptors 
   contained in dk.c
*/

#define dk_type(x)  (int)(((x)>>5)&0x07)
#define dk_haddr(x) (int)(((x)>>2)&0x07)
#define dk_uaddr(x) (int)((x)&0x03)

#define background cxfr.cx_state = 0;

/* describes the currently active transfer/expected interrupt */

struct current_xfr {
	char    cx_state;		/* see interrupt routine */
	short   cx_bcount;	/* number of status bytes */
	unsigned char *cx_bufloc;
	short   cx_busaddr;
	short   cx_unit;
	long	cx_sectno;
	short   cx_sector;
	short   cx_track;
	short   cx_head;
	short   cx_retry;
	short   cx_type;
	unsigned char    cx_addrrec[4];
	union {
		unsigned char    cx_STATUS[4];
		int cx_STATALL;
	} cx_un;
	unsigned char    cx_dsj;
	long    cx_xfrlen;
	caddr_t cx_xfrloc;
	int	cx_flags;
	int     cx_event;   /* temporary kludge */
/*
** cx_block was added to make lh_dk.c compile correctly.
** why it was missing originally is a mystery to me.... -jim andreas
*/
int cx_block;
/*
*/
	};
#define cx_status cx_un.cx_STATUS
#define cx_statall cx_un.cx_STATALL

struct simlist {
	caddr_t	sl_address;
	ushort	sl_xfrlen;
};

extern struct simlist *Simlist;

extern struct simlist s_table[];

/* structure for chained dma precalculation; order is critical, see
   mch.s */
struct simnext {
	char	sn_fill1;
	char	sn_pctrl;
	caddr_t	sn_address;
	short 	sn_xfrlen;
	char	sn_fill2;
	char	sn_dctrl;
	char	sn_clearibf;
	char	sn_pctr2;
	char	sn_sctrl;
};

extern struct simnext simnext;