/* KLEENIX_ID: @(#)pdi.h	26.1      */

#define OUTLINE	0x80			/* set if priveleged line */

/* register definitions */

#define	INTR_REG		4
#define	INTR_COND_REG		121
#define	MODEM_INTCOND_REG	13
#define	MODEM_INTMASK_REG	15
#define	MODEM_REG_7		7
#define	MODEM_REG_8		8
#define	BREAK_REG		6
#define	SPACE_AVAIL_REG		11
#define	CBLOCK_MASK_REG		14 
#define	BAUD_REG		20
#define	HANDSHAKE_REG		22
#define	PROTOCOL_REG		24
#define	INBOUND_MASK_REG	28
#define	CHAR_SIZE_REG		34
#define	STOP_BIT_REG		35
#define	PARITY_REG		36 
#define	CLEAR_REG		101 

/* control blocks for break, parity and framing errors */
#define REPORT_ERRORS_BREAK	0x0c
#define RCV_ERROR	0x08
#define FRMERR		0x08
#define PARERR		0x04
#define BRKBIT		0x10
#define RXINTEN 	0x02
#define TXINTEN 	0x04
#define MODEM_INTEN	0x08
#define PENABLE 	0x08
#define EPAR		0x10
#define TWOSB		0x04
#define SETBRK		0x40

#define	TRANS_ERR	0x0300		/* for control block reporting */
#define	BREAK		0x0200
#define	REPORT_MASK	0x0300
#define	CHAR_SIZE_MASK	0x03
#define	SET_RTS		0x01
#define	SET_DTR		0x02
#define	PARITY_NONE	0x00
#define	PARITY_ODD	0x01
#define	PARITY_EVEN	0x02
#define	DCD		0x02
#define	DATA_AVAILABLE	0x02
#define	WRITE_AVAILABLE	0x04
#define	MODEM_STATUS	0x08
#define	ONE_STOP_BIT	0x00
#define	TWO_STOP_BITS	0x02
#define	D1D3		3

#define ON	1
#define OFF	0